We must begin by establishing precisely what High-Bandwidth Memory is within the architecture of NVIDIA's business. HBM is not merely a component that NVIDIA purchases; it is the binding constraint on the entire system of AI compute capacity. The market for HBM has expanded from a $4 billion total addressable market in 2023 to a projected $35 billion in 2025, with consensus forecasts pointing toward $100 billion by 2028—a compound annual growth rate of roughly 40% 3,15,16,27,60,77. Yet this extraordinary expansion has not relieved the pressure on supply. If anything, it has intensified it, because the capacity to produce advanced HBM remains concentrated in the hands of exactly three manufacturers—SK Hynix, Samsung, and Micron—and only these three possess the capability to produce HBM4 through the next 18 months 17,24,29,72. The manufacturing itself is geographically concentrated in South Korea 2,5,6,62.
The interesting question is not whether this concentration is large, but why it persists and what it implies for the time horizons over which adjustment can occur. HBM manufacturing requires approximately three times the wafer capacity per bit compared to DDR5 24,77, and producing one HBM chip effectively displaces three standard DRAM chips 24. This trade-off has tightened standard DDR5 supply and elevated its prices and margins 17,73, with Micron reporting that non-HBM DRAM is experiencing similar supply tightness 27. Memory manufacturers are reallocating capital expenditure from conventional DRAM to HBM 17, and HBM now captures the premium value pool within the memory industry 33. SK Hynix, for its part, has focused on DRAM capacity over HBM in certain periods 18, a decision that further complicates the supply picture. The adjustment process is not instantaneous; new capacity arrives only after incumbents have already secured their supply 31,77, and the shortage is structural rather than cyclical—expected to persist for years rather than quarters 14,25,49,77.
The Architecture of Dependency
Every major NVIDIA accelerator is defined by its HBM configuration, and the trajectory of this configuration reveals the deepening structural dependency. The H100 provides 80 GB of HBM3 with approximately 3 TB/s bandwidth 12,44,45,58,72. The H200 lifts capacity to 141 GB of HBM3e at 4.8 TB/s 4,7,8,9,10,13,41,45,78. The Blackwell B200 doubles this again to 192 GB of HBM3e—representing a 140% capacity increase over the H100 44,58,77—and the GB300 maintains the same 192 GB per device, yielding 37 TB of HBM per rack 36,44. The DGX B200 system aggregates 1,440 GB of HBM3e across the rack 15,33, illustrating how memory—not compute—now defines platform value.
Looking forward, the Rubin architecture will introduce HBM4 with up to 288 GB capacity and 16 TB/s bandwidth at 1.8 kW power consumption 36,78, while the Rubin Ultra is expected to integrate HBM4E 21. The B300 and Vera Rubin platforms specifically require HBM4's higher density and bandwidth 58, and HBM4E is structurally co-designed into NVIDIA's architecture, limiting the ability of hyperscalers to pivot to lower-cost alternatives 17. The HBM generation roadmap reflects continued performance scaling: HBM3 at 800 GB/s per stack in 2022, HBM3E at 1,200 GB/s in 2024–2025, HBM4 projected at 1,500–2,000 GB/s in 2026–2027, and HBM5 projected at 3,000+ GB/s in 2028–2029 62. Notably, the HBM4 12-high volume production ramp is tracking twice as fast as HBM3E 12-high 60.
This co-design relationship is not merely technical; it is institutional. SK Hynix supplies the overwhelming majority of its HBM output to NVIDIA 19,22,42,50,55,65, and 60–70% of SK Hynix's HBM4 production is allocated to NVIDIA's Vera Rubin architecture via a multiyear co-development agreement 77. The company has further dedicated 60% of its new wafer capacity to HBM R&D 75, reflecting an extraordinary supplier commitment to NVIDIA's roadmap. NVIDIA, in turn, controls HBM allocation among its downstream partners 63, leveraging its procurement position to manage the broader AI ecosystem. We must be careful to distinguish between a relationship of simple buyer-supplier dependency and one of structural co-evolution; the evidence here points firmly to the latter.
The Supply Environment: Short-Run Rigidity
The supply environment is unambiguously constrained, and we must distinguish between the temporary bottlenecks that resolve within a production cycle and the structural capacity constraints that require years of capital investment to alleviate. The current situation exhibits characteristics of both, but the structural elements dominate.
Micron's 2026 HBM output is fully sold out under long-term contracts, a fact corroborated by ten independent sources 1,11,20,25,28, and customers are already queuing for 2027 production slots 32,59. Micron has committed its calendar 2026 HBM output 59 and is locking in 2027 supply 59. SK Hynix's HBM orders are locked until 2028 75, and HBM3E supply for NVIDIA's Blackwell platform remains fully allocated 30. Manufacturing facilities are operating at 100% capacity around the clock 17, constrained further by EUV lithography limits 23 and TSMC's CoWoS advanced packaging bottleneck 17,36. Lead times are extending 53,54,71, and no significant slowdown in HBM demand is currently evident 71.
The implication is that insufficient HBM supply is preventing NVIDIA from increasing H100 and B200 shipments 62, which constrains revenue acceleration even as demand remains robust. This is not a demand-side problem; it is a capacity-side constraint with a long adjustment period.
Cost Economics and the Margin Question
We now turn to the most analytically significant question: what are the cost implications of this structural dependency, and how do they propagate through NVIDIA's margin structure?
HBM represents a dominant share of accelerator manufacturing cost. Industry estimates place HBM at 30–45% of total accelerator manufacturing expenses 34,77, with some high-end GPU packages exceeding 50% 52. Per-gigabyte pricing reflects this premium: HBM costs $12–18 per GB versus $3–5 for DDR5, making HBM three to five times more expensive 62. The cost trajectory is steeply upward. On a rack basis, the HBM cost increase from Blackwell to Rubin is $200,000 to $300,000 67,70,74, while the total rack price increases by $2 million to $3 million 67. The B200 rack HBM cost is approximately $156,000 (5.2% of ASP) 67, while the Rubin V200 rack HBM cost rises to roughly $382,000 (6.4% of ASP) 67. At the system level, the DGX B200 provides 64 TB/s of HBM3e bandwidth 15,33. HBM4E is expected to deliver greater than 20% energy efficiency improvement 21 and approximately 17% lower thermal resistance than HBM4 21, while Micron states HBM4 offers 2.3x the bandwidth of HBM3E 33. Gross margins for HBM production itself exceed 50% 72, reflecting the premium value capture by memory manufacturers.
These dynamics create direct margin pressure for NVIDIA. Market participants have expressed concerns about HBM costs compressing NVIDIA's gross margins 35,70,74, with rising HBM and memory prices identified as contributing to declining gross profit margins 76. Here, however, we must consider the counterargument with equal rigor. Bank of America analysts contend that the impact is overstated when one accounts for concurrent rack price increases 70, and early buyers of GPU clusters benefit from lower depreciation costs compared to new entrants facing the 2025–2026 HBM repricing 77. NVIDIA's competitive moat in allocation also enables it to pass costs through to customers, somewhat insulating margins. The cost dynamics nevertheless remain a material watchpoint for the Rubin transition 70.
Architectural Alternatives and the Margin of Substitution
The HBM premium is large enough to stimulate alternative architectural approaches, and we must examine these not as immediate threats but as indicators of the elasticity of substitution at the margin. The question is not whether these alternatives exist, but whether they can substitute for HBM in the specific performance envelope that NVIDIA's most demanding workloads require.
Qualcomm's High-Bandwidth Compute (HBC) technology stacks LPDDR memory directly on a compute die to provide SRAM-like latency at HBM-like capacity 47,51, with six times better bandwidth-per-watt than standard GPUs 61 at lower cost by replacing expensive HBM with mobile-style memory 61. Qualcomm explicitly markets HBC as a solution to the memory wall 47,61 and intends to disrupt the GPU-centric market structure 47. Cerebras Systems has taken a different approach, deliberately avoiding HBM to sidestep the supply constraint and its associated costs 56. Fiber Memory systems achieve approximately 3.2 TB/s per-accelerator bandwidth, roughly matching the H100's HBM3 bandwidth of 3.35 TB/s 69, while reducing reliance on local HBM/DDR stacks 69. CXL memory is estimated at four to five times more cost-effective than GPU HBM 66, and High Bandwidth Flash (HBF) offers lower cost per gigabyte 40,68. Positron similarly focuses on high memory bandwidth utilization without standard HBM 38, while a non-CUDA, HBM-integrated CPU path provides a strategic architectural alternative as GPU economics become strained by HBM premiums 77. Meta has placed HBM directly beside compute chiplets using 2.5D packaging 37, further exploring disaggregated memory topologies.
None of these alternatives currently matches HBM's full performance envelope for the most demanding workloads. But the very existence of this research effort signals that the HBM premium has reached a level that makes substitution economically rational at the margin. This is a long-term competitive consideration for NVIDIA, even if it does not alter the near-term picture.
Geopolitical Dimensions of the Supply Chain
We must also distinguish between the geographic concentration of HBM manufacturing and the geopolitical exposure of the supply chain. China currently lacks HBM production capability due to US export controls 62,72, and Chinese HBM technology lags three generations behind industry standards 17. CXMT's HBM yield rates lag significantly behind incumbents, limiting it to sample production for domestic customers 23, while the capability gap between international manufacturers and Chinese firms is widening annually 62. Huawei is developing in-house HBM at SMIC as a vertical integration strategy 64, though production is constrained by HBM scarcity 46 and faces unproven yield risks 43. Hybrid bonding tools for HBM are sourced from Europe and subject to export controls 62, and HBM equipment suppliers are based in Japan, the US, and Europe 62.
Importantly, however, the HBM supply chain itself has no exposure to adversarial jurisdictions 62, and HBM packaging occurs in Taiwan 62, concentrating geopolitical risk in the packaging stage rather than memory fabrication. This is a meaningful distinction: the vulnerability lies in advanced packaging infrastructure, not in the memory fabrication process itself.
Cyclical Risks and the Long-Run Equilibrium
Despite the current tightness, we must consider the long-run equilibrium toward which this market is evolving. The HBM boom is expected to peak around 2028, followed by sharp projected sales declines 39. This reflects both supply expansion—multiple manufacturers are simultaneously expanding HBM production, posing an oversupply risk 75—and potential demand tapering 26. SK Hynix faces risks from hyperscalers potentially reducing HBM intensity per unit of compute 57 and from falling AI accelerator demand or declining HBM content per accelerator 57,75. It is worth recalling that industry participants had previously viewed HBM as an 8–10 year payback cycle and a "useless track" due to I/O imbalance 75, underscoring the dramatic shift in perception and the possibility of an equally dramatic reversal.
If the 2028 peak materializes as projected, HBM suppliers could face margin compression just as NVIDIA's Rubin Ultra and post-Rubin platforms are ramping—a scenario that could either ease NVIDIA's cost pressure or create supply-demand mismatches depending on the pace of capacity additions. The timing and magnitude of this transition remain uncertain, and current lead times continue to extend 53 with no demand slowdown currently evident 71. The prudent analytical stance is to acknowledge this cyclical risk as a real possibility that is not currently reflected in supply-tightness indicators, while recognizing that the data required to confirm or refute it will not be available for several quarters.
Implications and Conditional Conclusions
Under current conditions, the evidence suggests the following. First, HBM is the binding constraint on AI compute supply, with NVIDIA uniquely exposed as both the dominant consumer and the entity whose roadmap dictates supplier investment cycles—70% of NVIDIA's HBM4 orders go to a single supplier 48, and SK Hynix allocates 60–70% of its HBM4 output to NVIDIA's Vera Rubin 77. Second, the market structure is a tight oligopoly: only three manufacturers produce HBM4 17,24,29,72, capacity is sold out through 2026–2027 1,11,20,25,28,32,59, and the shortage is projected to persist for years rather than quarters 14,25,77. Third, HBM cost dynamics represent a material margin headwind for NVIDIA—30–45% of accelerator manufacturing cost 34,77, with rack-level HBM cost rising $200,000–$300,000 from Blackwell to Rubin 70,74, and the Rubin V200 rack HBM cost reaching approximately $382,000 67—though NVIDIA's allocation control and pricing power provide partial insulation. Fourth, architectural alternatives are emerging in response to the HBM premium, but none currently matches HBM's performance for the most demanding AI workloads, preserving NVIDIA's near-term position. Fifth, a projected 2028 HBM market peak 39 introduces a forward-looking cyclical risk not visible in current supply indicators, creating a potential scenario where NVIDIA's cost dynamics ease as supplier capacity catches up.
The supply constraint also functions as a competitive moat in a subtler sense. Companies that secured GPU clusters before the 2025–2026 HBM repricing benefit from lower depreciation costs 77, and early movers in the AI infrastructure build-out have structurally lower cost bases. This creates a barrier to entry for new AI infrastructure participants and reinforces the position of hyperscalers and early-entrant neoclouds. The market, in other words, is not merely constrained—it is stratified, with the timing of entry determining the cost structure of incumbency.
Nature does not leap, and neither do semiconductor supply chains. The adjustments required to relieve the HBM bottleneck will unfold over years, not quarters, and the strategic question for NVIDIA is not whether the constraint will eventually ease, but how the firm's architecture, supplier relationships, and pricing power will evolve during the period of tightness. The data presently available suggest that NVIDIA's position remains strong, but the cost trajectory warrants careful monitoring, and the 2028 cyclical risk represents an uncertainty that the market has not yet fully priced.
