The strategic question in advanced AI infrastructure is no longer confined to compute throughput. HBM availability, performance, thermal management, advanced packaging, and emerging memory architectures increasingly determine accelerator capacity, system economics, and competitive differentiation. NVIDIA’s reported partnership with SK Hynix is intended to improve access to, or support development of, HBM 17. Memory is therefore not simply a component cost; it is a strategic supply-chain asset whose availability can determine whether a completed GPU becomes a shippable system.
The market remains tight while its structure is evolving. Global HBM sales exceeded $30 billion in 2025 56,64, demand is forecast to grow sharply through 2030 5, and HBM content per chip continues to increase 5. Yet only three companies are supplying HBM4 at scale 14. Production consumes roughly three times the wafer area required for DDR5 56,64 and may require reallocating as much as 35% of wafer capacity 56. In the short run, this concentration constrains accelerator shipments. In the long run, it creates incentives to expand capacity, qualify additional suppliers, and redesign memory hierarchies.
The appropriate framework is consequently one of synchronized ecosystem execution. NVIDIA’s output depends not only on GPU demand, but also on HBM yield, wafer allocation, advanced packaging, substrates, foundry capacity, thermal management, and the timing of customer qualification. The immediate equilibrium favors memory suppliers. The longer-run equilibrium will depend on how rapidly capacity expands and how readily customers can substitute across suppliers, architectures, and memory tiers.
HBM4: The Immediate Constraint
Samsung’s improving position
HBM4 is moving from qualification toward commercial deployment, although supply and execution remain binding variables. Samsung is already shipping HBM4 2,27 and announced the industry’s first commercial HBM4 shipment in February 2026 27. It has delivered HBM4E samples to major customers 2, shipped industry-first HBM4E samples 3, and moved HBM4E into production-quality inspection rather than leaving it solely within research and development 29.
Samsung expects HBM4 sales to rise more than threefold quarter over quarter in the third quarter 3, with HBM4 representing well over 60% of HBM revenue in the second half 3. Customer qualifications are being completed 3, and Samsung has signed HBM supply agreements for 2027 3. It also expects substantial unmet memory demand to roll into the following year 6. These developments improve the prospect of future supply visibility for NVIDIA, but the scale of the ramp must be interpreted carefully: growth from a small starting base, or dependence on a limited number of projects, could still constrain the practical contribution 3.
Samsung is expected to gain HBM4 share 5 and intends to bring its HBM share broadly in line with its overall DRAM share 3. Goldman forecasts 87% year-over-year growth in Samsung’s HBM business in 2027 7. Additional qualified supply should primarily improve unit availability rather than immediately reduce cost 3. While demand exceeds supply, Samsung may gain share without forcing incumbent shipments or absolute prices lower 3. For accelerator customers, the important distinction is between nominal supplier expansion and usable, qualified capacity.
SK Hynix and the value of contracted capacity
SK Hynix appears to retain strong near-term execution momentum. Its HBM4 yield is approaching mature HBM3E levels 28, and product quality is also described as nearing HBM3E standards 28. HBM4 is stated to operate above 10 Gbps, exceeding the 8 Gbps JEDEC standard 30, while delivering more than 40% better power efficiency 30. Its 2,048 I/O terminals, double those of the prior generation, enable approximately twice the bandwidth 30. HBM4 shipments are expected to become more meaningful for SK Hynix in the third quarter 62, while confirmation of HBM4 and HBM4E pricing relative to HBM3E remains a potential catalyst 28.
Long-term customer agreements, generally around five years 28, provide demand visibility 1,30, may include deposits and other financial safeguards 30, and can improve working capital 28. Approximately ten negotiations had been completed by the Q2 2026 earnings call 28. For NVIDIA and other accelerator customers, such arrangements reduce the risk that completed packages cannot be shipped because memory is unavailable 3. Their economic value, however, depends on enforceability, take-or-pay provisions, pricing floors, cancellation terms, deposit refundability, remedies, and the proportion of capacity covered 28. They may also cap supplier upside if spot prices rise after volumes are committed 30.
This is a useful example of why customer concentration cannot be reduced to a single percentage. A multi-year agreement may secure allocation, but it can also reduce flexibility and expose the buyer to an unfavorable price or technology mix if the market evolves. The relevant elasticity of substitution is therefore low in the short run, particularly once a stack has been qualified for a specific accelerator package.
Why the physical architecture matters
Standard HBM4 is described as offering 36–48 GB, a 2,048-bit interface, and peak read throughput of 2.5 TB/s 65. Other estimates place HBM4 at up to 64 GB per stack, with more than 2.5 TB/s of bandwidth using 16 layers 22, although a direct 16-layer comparison uses 36 GB 22. A proposed memory hierarchy assigns HBM4 2.5–4.5 TB/s of bandwidth and roughly 10 ns latency 65, while HBM3E and emerging HBM4 can exceed 2.5 TB/s per stack 61,65. HBM4 is also expected to provide approximately twice the bandwidth of the prior generation 30.
These capacity figures need not be contradictory. They likely reflect different stack heights, configurations, or distinctions between standard and maximum implementations. The more important conclusion is that accelerator design is being co-optimized with memory bandwidth, stack count, thermal density, logic base dies, and package integration. Compute throughput alone is no longer a sufficient description of system capability.
AMD’s Helios rack illustrates the direction of travel. The platform is reported to contain 31 TB of HBM4 14 and to provide 50% greater HBM4 capacity than prior generations 67. AMD has secured visibility into HBM supply for planned 2027 deployments 19,45, yet HBM remains a key constraint and strategic input for its accelerators 19. The associated risks span HBM4, advanced packaging, substrates, foundry capacity, power, cooling, and other components 16; MI455X requires significant quantities of HBM4 32. The implication for NVIDIA is direct: accelerator vendors will compete not only for wafers and packaging capacity, but also for priority access to qualified HBM stacks 51.
Supply, Pricing, and the Delayed Long Run
Capacity expansion will not immediately resolve scarcity
The supply response is substantial but delayed. SK Hynix’s board approved a ₩54 trillion expansion investment on 7 August 58. The broader program extends through 2031 11,15,58, with cleanroom completion targeted for 2028–2029 11 and new capacity not expected online until 2028–2029 15. Yongin Fab 1 is expected to open its cleanroom in early 2027, after which capacity expansion can continue 28. The project is therefore a long-term strategic commitment rather than an immediate production solution 13. Constraints may persist for multiple years because the newest expansion targets 2029 70.
HBM production tightens effective DRAM supply even when wafer starts increase 10. It requires wider interfaces, taller stacks, advanced packaging, and stricter thermal management 25, together with additional processing, testing, stacking, and packaging beyond standard wafer production 3. This supports sustained pricing and makes advance commitments more valuable than reliance on spot procurement.
Pricing creates a feedback mechanism
Industry pricing remains favorable to memory suppliers. Samsung reported a mid-40% quarter-over-quarter increase in DRAM average selling prices 3, while peers are expected to report increases of 45%–70%, exceeding the expected growth at SK Hynix 62. Bank of America expects SK Hynix DRAM average selling prices to increase by approximately 25% or more in the third quarter 62. HBM generally carries superior economics to conventional DRAM because of premium pricing, manufacturing complexity, advanced packaging, and constrained supply 9,10. Its value depends on bandwidth, energy efficiency, thermal performance, packaging reliability, yield, and accelerator compatibility—not price per bit alone 30.
The counterforce is demand-side adjustment. Higher HBM prices may encourage hyperscalers to develop custom accelerators 28, improve architectural efficiency 28, or diversify memory suppliers 28. They may also lengthen procurement cycles because of higher server bills of materials 28. If shortages intensify, GPU shipments could be delayed or reduced 18, while costs could rise 18. Strong AI demand therefore does not automatically become recognized NVIDIA revenue if the memory and package cannot be delivered with the GPU.
Three qualified suppliers in 2027–2028 could increase accelerator customers’ bargaining leverage 3 and improve supply diversification 3. The timing of that adjustment remains uncertain. Memory producers disagree about which company will capture share 37, and some commentators believe new HBM competitors remain multiple generations behind HBM3 and HBM4 5. CXMT presentations allegedly suggest that it could replicate capabilities comparable to SK Hynix approximately three years earlier within two to three years 26, but this remains an isolated and unverified claim. NVIDIA’s leverage should improve as supply broadens, although dependence on a concentrated supplier base remains strategically material.
Beyond Conventional HBM Scaling
Samsung’s zHBM
Samsung’s zHBM introduces a second strategic layer: future AI memory may consist of heterogeneous tiers rather than a simple continuation of conventional HBM scaling. The architecture vertically places memory on an AI accelerator 40,48 to shorten data movement 38,39,44,49,63. Samsung claims advantages in bandwidth, latency, energy efficiency, density, and thermal performance 44,48,57. It claims four to eight times HBM5 performance, with the four-to-eight-times claim supported by 14 sources 24,38,40,48,49,50,57. Separate claims describe up to eight times performance 39,50,53,57,63, more than ten times density 40,43,44,48,50, and roughly three times energy efficiency 38,40,43,44,48,49,63.
Samsung’s HBM5 roadmap uses a 2nm base die and Heat Path Block improvements 38. HBM5 is expected to provide twice HBM4E performance and reduce thermal resistance by 20% 38. zHBM’s thermal-resistance claim ranges from approximately 10%–25% of HBM5 levels 49, while another claim describes a reduction of greater than 50% 38. These differences should be treated as company-specific, unverified targets rather than established performance.
Samsung identifies zHBM as a concept rather than a commercial product 43,44, and its claims remain subject to independent validation 24,38,48. The architecture faces thermal, packaging, and reliability challenges 44,48, as well as manufacturability, yield, cost, compatibility, and customer-adoption risks 40. It may remain a concept 48, and Samsung faces broader execution and commercialization risk 38, including the possibility that its HBM products fail to close the competitive gap 42. Conventional HBM4, HBM5, or competing technologies could narrow zHBM’s advantage 38.
The investment relevance is consequently asymmetric. If commercially viable, zHBM could improve density, bandwidth, latency, energy efficiency, and thermal behavior 44. But the path from concept to normal production is constrained by packaging, reliability, yield, and customer qualification. NVIDIA could benefit from earlier access to a more efficient memory-compute package, but should avoid making its roadmap dependent on an architecture whose performance and manufacturability remain unverified.
HBF as a complementary tier
HBF, developed by SK Hynix and SanDisk, is a more immediately specified but narrower alternative. Its first specification targets up to 512 GB 22,36,47 and 0.4–3.0 TB/s bandwidth through an Open Compute Project standard 47. A published implementation supports up to 3.0 TB/s between HBF and the accelerator platform 36. The architecture uses stacked NAND 36, offering substantially greater capacity, potentially lower cost per stored bit, lower idle power, and closer accelerator integration 61. First-generation read bandwidth of 1.6 TB/s exceeds the cited HBM3E comparison of approximately 1.2 TB/s, but remains below HBM4’s 2.5 TB/s 22. Later-generation HBF throughput is projected to exceed 3.2 TB/s 65.
Sampling is scheduled for the second half of 2026, with targeted mass production in 2027 63, although Sandisk and SK Hynix have also been described as targeting product launches after 2027 22. HBF should not be interpreted as a universal HBM replacement. It is more plausibly a complementary tier for workloads in which read capacity matters more than write speed and latency 22. Write-heavy prefill and key-value-cache workloads remain dependent on HBM DRAM 61.
HBF’s commercial success depends on the evolution of HBM and emerging nonvolatile memory 22. HBM, HBF, and SSD tiers may substitute for or cannibalize one another 63, while HBM4 and later generations could narrow HBF’s capacity and bandwidth advantage 22. Competitive responses from HBM, CXL, and DRAM vendors could limit the opportunity 46. The architecture also requires successful integration of NAND, HBM, and logic at advanced-packaging scales 61, and ecosystem alignment is a technical and operational challenge for both HBF and zHBM 63. For NVIDIA, HBF may eventually lower the cost of large-capacity memory for selected inference, cache, and read-dominant workloads, but near-term accelerator performance remains anchored by HBM.
The Packaging and Equipment Ecosystem
The growing complexity of memory systems broadens the economic opportunity beyond memory manufacturers. Advanced packaging and HBM-stack integration are estimated to add 3.3% and 1.5%, respectively, to relevant packaging opportunities over short- to medium-term horizons 27. Greater HBM content per accelerator and stack integration are growth catalysts for advanced packaging 27, as is the migration to HBM4 27. South Korea’s advanced-packaging market CAGR is projected to exceed that of the United States by 0.6 percentage point because of HBM production and qualification 27.
HBM4, HBM4E, and HBM5 raise stack heights, pin counts, I/O speeds, thermal density, and total bandwidth 9. Their complexity supports growth in semiconductor testing and equipment 9. KLA, Camtek, and Onto Innovation may benefit disproportionately because inspection intensity can rise faster than wafer volume 37. KLA benefits from yield-improvement requirements across HBM4, 2nm logic, advanced packaging, and high-layer-count NAND 3, and its investment case relies on HBM and advanced packaging 34. Applied Materials may benefit indirectly 31. Entegris has reported HBM4 and TSV wins 37,50, while Cohu has shipped additional HBM3, HBM4, and HBM4E inspection systems 29.
The adjustment is not one-directional. Delayed or failed HBM qualification could reduce packaging-equipment demand 52, and the pace of HBM investment is a cycle-related risk for KLA 34. NVIDIA’s supply security is thus connected to a wider capital-equipment and packaging ecosystem whose own investment cycle may amplify or restrain capacity growth.
Financial and Market-Dynamic Considerations
SK Hynix reported Q2 2026 revenue of ₩24.2 trillion 54 and approximately ₩60.5 trillion of operating profit 30, with positive operating leverage 54. First-half revenue was approximately 36% above all of 2025 30. Its 49% operating margin and Q2 growth may reflect peak-cycle conditions 54, while a separate 76% margin estimate is described as extraordinary and unsustainable 28. Memory remains cyclical, and current earnings may not represent mid-cycle economics 54. Valuation therefore depends on normalized prices, sustainable margins, future capital expenditure, customer concentration, post-expansion free cash flow, and the durability of HBM’s moat 5.
SK Hynix’s A3 credit upgrade 44 and improved profitability, cash generation, and resilience 44 support its financial capacity. However, depreciation and fixed costs will rise as new fabs enter service 28, while capital-intensive equipment investment could pressure free cash flow 41. For NVIDIA, the relevant issue is not HBM price in isolation, but whether additional HBM content expands the total value of an accelerator system faster than it raises the bill of materials. Custom accelerators and architectural efficiency improvements 28 remain a long-run check on NVIDIA’s pricing power.
Capital allocation introduces a related tension. Samsung and SK Hynix currently return roughly 50% of free cash flow through dividends and buybacks 62,66,68, but investors argue that their balance sheets remain inefficiently large 66 and have demanded higher dividends and buybacks 55,68. Christopher Clode has advocated a payout ratio of at least 80% of free cash flow 68. SK Hynix has declared a ₩375 dividend and is reviewing additional measures 59, with details expected in the third quarter of 2026 59.
Management’s limited guidance has disappointed investors 66, and JPMorgan said that a clearer capital-allocation stance was imperative to restore sentiment 66,68. A potential buyback could be bullish if confirmed 59,60, but the unverified report creates information-quality and event-driven gap risk 60. Buybacks are not equivalent to recurring income for income-focused investors 60. For NVIDIA, the broader lesson is that suppliers may reasonably prioritize reinvestment over immediate shareholder returns while capacity is scarce. The same decision can support future allocation security while limiting near-term cash distributions.
Market enthusiasm has also become unusually unstable. Reported gains of more than 16% for the KOSPI, 21% for Samsung, and 24.6% for SK Hynix 4 substantially exceeded the broader index 4, while post-peak reversals indicated elevated sentiment volatility 68. South Korean retail investors shifted from real estate and cryptocurrency toward the two memory leaders 20, and Goldman described hedging demand as immense 69.
SK Hynix’s Nasdaq listing has strengthened U.S.–Asian market linkages 20,21, may improve liquidity and access to AI-focused funds 30, and could align Korean and overseas valuations over time 41. Price discovery can nevertheless diverge between local shares and the later-opening ADR 8, compressing several sessions of sentiment reversal into one Korean-market move 8. Technical levels identified for SK Hynix include KRW 1.70–1.718 million resistance 41, KRW 1.57–1.54 million as first support 41, KRW 1.483 million as the medium-term bullish/bearish dividing line 41, and KRW 1.426 million as deeper defense 41. A high-volume break and hold above KRW 1.718 million would improve the setup 41, whereas weak-volume breakouts or long upper shadows would raise reversal risk 41. These observations are relevant to NVIDIA primarily as a read-through on supplier volatility and the broader AI-capital-expenditure trade, not as a fundamental valuation signal for NVIDIA.
Implications for NVIDIA
Near-term: synchronize the ecosystem
The immediate implication is that NVIDIA’s accelerator revenue outlook increasingly depends on synchronized execution across the supply chain. AMD’s supply visibility and Helios configuration show that competitors are securing multi-year HBM capacity 19,45, while the reported 31 TB of HBM4 in that system demonstrates the scale of memory required by next-generation AI infrastructure. NVIDIA should therefore be assessed on its ability to secure and diversify qualified HBM, manage memory intensity by workload, and coordinate memory, packaging, power, cooling, and interconnect decisions with accelerator launches.
The reported SK partnership 17 is significant in this context. It should be understood as part of a broader effort to secure HBM access, support qualification, and align memory roadmaps with accelerator deployment. HBM4’s improving yield, higher bandwidth, better power efficiency, and growing rack-level capacity benefit NVIDIA’s platform, but the company remains exposed to bottlenecks in wafer allocation, advanced packaging, thermal management, substrates, and foundry capacity.
Medium-term: preserve architectural flexibility
The medium-term opportunity is architectural. zHBM could improve the energy and thermal economics of tightly coupled memory and compute, while HBF could provide a higher-capacity tier for inference, cache, and read-dominant workloads. Both technologies, however, face delayed commercialization, ecosystem coordination, packaging, reliability, yield, and performance-validation risks 63.
NVIDIA is best positioned if it remains architecture-agnostic and uses its software, interconnect, packaging, and platform-control advantages to make multiple memory tiers interoperable. The principal counterforce is that high memory prices may induce hyperscalers to redesign workloads or develop custom accelerators, reducing dependence on NVIDIA’s full-stack platform.
Long-term: do not mistake scarcity for permanence
The cluster presents a clear tension between powerful secular demand and potentially peak-cycle economics. HBM demand, rack-level memory content, and advanced packaging are expanding, but qualification, ramp timing, pricing, yield, and customer concentration remain execution risks 3,23,30,54. SK Hynix’s strong underlying business reflects demand exceeding supply 8, yet record results can still be followed by a selloff if they miss elevated expectations 8,12. Long-term contracts can also cap upside 30.
HBF and zHBM could broaden memory capacity and reduce system cost, but they could also alter or cannibalize the value proposition of conventional HBM 33,35. Samsung’s conventional HBM4 execution is improving, whereas zHBM remains uncommercialized 40,43,44,63. The proper conclusion is conditional: near-term HBM scarcity reinforces NVIDIA’s strategic importance and supports supplier economics, while medium-term diversification, architectural substitution, and customer-designed silicon may moderate both memory pricing and NVIDIA’s scarcity premium.
Key Takeaways
- HBM4 is the immediate strategic bottleneck for AI accelerators. Supply is concentrated, wafer- and packaging-intensive, and likely to remain tight through the 2028–2029 capacity cycle 14,56,64,70.
- NVIDIA’s SK partnership 17 is strategically significant because HBM allocation, qualification, thermal performance, and package integration increasingly determine GPU shipment capacity and system economics.
- Samsung’s zHBM and SK Hynix/SanDisk’s HBF could reshape memory hierarchies, but their unverified performance claims and commercialization risks make them medium-term options rather than near-term substitutes for HBM 22,24,38,40,48,49,50,57.
- The principal monitoring variables for NVIDIA are multi-year HBM commitments, supplier qualification and yield, advanced-packaging capacity, HBM content per accelerator, hyperscaler custom-silicon activity, and the normalization of memory pricing and margins.
Under current conditions, the evidence supports a two-horizon conclusion. In the short run, memory-system control is becoming as important as GPU compute leadership, and securing qualified HBM is a prerequisite for converting AI demand into shipments. In the long run, however, capacity expansion and architectural substitution will gradually alter the equilibrium. NVIDIA’s durable advantage will rest not on scarcity alone, but on delivering superior system-level performance per dollar across an evolving and increasingly heterogeneous memory ecosystem.