The decisive fact for Broadcom Inc. is this: its investment relevance is being defined indirectly, through its embedded position in hyperscaler custom silicon rather than through its own disclosed results. Google TPU 8t is described as a training chip built with Broadcom 19, and that single co-build tells more about where value accrues than any verified Broadcom disclosure in the material.
This is the old industrial logic in new form. The debate has moved from compute-constrained training to memory-constrained inference, and from general-purpose GPUs to purpose-built ASICs. Where the general merchant chip once commanded the mill, the advantage now goes to whoever controls cost at the memory hierarchy and integrates compute, interconnect, and system design into one disciplined machine.
How We Got Here: Fragmentation by Design
Google Divides the Work to Kill Waste
Google split its TPU architecture into TPU 8i and TPU 8t 19, with the 8th-generation TPU family split into two purpose-built variants 12. The discipline of capital is plain: the split is explained as a decision driven by no longer wanting dark silicon to sit idle depending on the workload 19.
The TPU 8i inference variant has 384 MiB of on-chip SRAM 12 and is designed to hold dynamic dialogue states and key-value caches entirely on-chip 12, which cuts off-chip memory latency to zero for those operations 12. The same program is elsewhere credited with 3x on-chip SRAM 1,19. In industrial terms, this is specialization to raise utilization — no idle capacity, no wasted fixed cost, every transistor set to productive work.
At system scale, the Google TPU 8t supports clusters of up to 9,600 chips 12, while Google is extending custom silicon across the AI system stack, including compute, memory interfaces, storage, and networking 12. That is not a chip purchase. That is vertical integration across the stack, from accelerator to fabric to storage.
The Cost Curve Decides
The strategic logic is cost. Memory is the dominant cost in AI server hardware rather than compute 10, and Google uses a combination of TPUs and software to mitigate memory cost pressure in AI servers 10.
That logic generalizes beyond one customer. The source states that demand for ASICs is high for the inference buildout 18, and hyperscalers and well-funded AI laboratories are designing their own ASICs 17. When the master resource is memory bandwidth and inference efficiency, the mills will be rebuilt around it.
The Contest: Who Owns the Means of Computation
OpenAI Enters the Foundry
The most corroborated competitive datum in the set sharpens the implication for Broadcom. OpenAI has unveiled its first custom inference silicon chip, codenamed Jalapeno 2,3,4,5,8,9,14, an event carried by ten independent sources and therefore more robust than the single-source TPU details.
Jalapeño reportedly achieved lower latency than Nvidia GB200 and GB300 systems in early tests 6, and according to a power-efficiency comparison conducted by SemiAnalysis, OpenAI's first custom chip leads in power efficiency 11. A frontier laboratory beating the merchant kings on latency and power on its first outing is the kind of result that rearranges bargaining power.
The source explicitly identifies competition involving AVGO and OpenAI 16, while custom ASIC disruption is identified as a company-specific catastrophe risk 17. Broadcom does not merely face merchant-chip competition; it faces its own customers and frontier labs as rival builders.
Nvidia Seeks to Own the Railroad, Not Just the Engine
Nvidia's response is telling: the strategy is described as less a defensive move against custom AI chips than an attempt to control the infrastructure around them 13, with NVLink Fusion supporting third-party processors 13. If you cannot prevent custom silicon, you enclose it — own the interconnect, dictate the rack standard, and collect the toll on every third-party processor that must travel your rails.
Fragile Arithmetic, Real Sentiment
Financially, the only AVGO-specific quantification is fragile. One commenter said that AVGO would generate $230 billion in AI revenue in FY2028 15. That is a single-source, late-August assertion, not a corroborated estimate, and it stands apart from a file that otherwise provides no information about Broadcom's corporate governance beyond mentioning governance features for AI 7. It should be read as sentiment about the scale of the custom-silicon prize, not as guidance.
Collectively, the material frames Broadcom as a picks-and-shovels beneficiary of fragmentation: if hyperscalers diversify beyond GPUs, value migrates to interconnect, memory hierarchy, and system integration where Broadcom co-designs. The upside is leverage to Google-scale training and inference buildouts without owning the full platform; the vulnerability is that the same diversification empowers hyperscaler customers who can shift architectures, insource more, or house custom silicon inside a rival's rack standard.
What Endures When the Frenzy Cools
- Broadcom's clearest near-term AI lever in the material is the Google TPU 8t co-build, positioned around on-chip memory and workload-specific efficiency rather than raw FLOPS.
- Inference economics — memory cost dominance and high ASIC demand — support a durable custom-silicon cycle, but OpenAI's Jalapeno progress confirms AVGO faces frontier-lab competition, not just merchant-chip competition.
- The $230 billion FY2028 AI-revenue assertion signals bullish expectations for custom silicon scale while lacking corroboration, leaving financial outlook tied to hyperscaler capex conversion rather than to verified Broadcom disclosure.